The user submits a GDSII mask file to ePIXfab.
In order to make this mask file:
- the user should use capable layout software
- ePIXfab provides a design rules document and process design kit
- ePIXfab currently does not provide a design library with predefined structures - the user needs to build that.
The current design flow for silicon photonic IC's can be described as follows:
- Read design rules and know minimum feature sizes and process limitations
- Behaviour of optical and opto-electronic components is simulated with modeling software (electromagnetic, multiphysics, ...) or (semi-) analytical models implemented in e.g. Matlab
- In some cases, translate resulting data to parameters for circuit simulation
- Translate simulated designs into a mask layout for fabrication
- Verify mask with design rule checking (DRC) software and correct issues
ePIXfab provides a PDK, containing:
- design rules and guidelines
- template and predefined masks
- an example library containing correctly defined structures (note: this is not a basic cell library)
- IMEC:
- settings files for Cadence, MaskEngineer, DW-2000 and KLayout
- DRC deck for Calibre
Various European companies and research institutes are working on a more advanced design flow for silicon photonics:
- with layout, schematic, netlist and simulation capabilities
- with basic cell libraries
- with interoperable software to form an integrated flow
- with choice of software packages and vendors for the different stages in the flow
This work is a.o. being performed in the FP7 Helios and FP7 EuroPIC research projects. Results from this will be incorporated into the ePIXfab design flow in the future, but as long as this is not establihed, the above design flow is common practice.